Self-assembling Electronics

Self-assembling Electronics

Currently photolithography is used to fabricate chips. But when ICs are scaled down to 30 nanometers or less the cost of the technology is prohibitively high. To enable ongoing miniaturization Dr. Tang is developing a method to build electronics using self-assembling molecules.

Microchips are made by etching the circuit design into a silicon substrate using photolithography. For this patterning technique the silicon wafer is coated in light sensitive chemicals. A template of the design called a photomask, is placed above the wafer. UV light is shone through the template projecting the pattern on the silicon substrate through a miniaturizing lens. Those regions of the coating exposed to UV light harden, forming a pattern. The waver is then submitted to a cleaning process to remove the unsolidified coating so that only the design remains. Then, using a chemical agent, the top layer of the substrate unprotected by the coating is removed, engraving the design into the wafer.

Chuanbing Tang of the University of Carolina proposes to turn to an additive process rather than subtraction. Instead of etching a pattern into the wafer’s perfectly smooth surface, Tang is adding one on top of it. He places molecules on a silicon substrate and makes them self-assemble into the desired pattern.

Tang and his team at the department of chemistry and biochemistry used a well-established method involving block copolymers. Polymers are macromolecules composed of multiple repeating subunits: the monomers. A block copolymer consists of different types of monomers (co) arranged in multiple alternating sequences (blocks). In Tang’s patterning technique the monomers are designed in such a way that the monomers self-assemble into block copolymers forming well-ordered periodic arrays.

The novelty of the assistant professor’s research is the proof that it is possible to integrate iron nanoparticles into the array. It’s an important contribution because if you want to use self-assembling nanostructures for IC fabrication it is necessary to include metals. To do this Tang took ferrocene, an organometallic compound which can decompose into iron nanoparticles and incorporated it into a block copolymer. Succeeding in creating an iron laced pattern on a silicon substrate without the use of lithography.

The problem with lithography below the 30 nanometer scale is the template. Reducing the size of the features of the template is increasingly expensive to a point where it is no longer cost effective for mass production, according to Tang. But our insatiable need for shrinking electrical components most likely won’t stop at the 30 nm mark. Self-assembling electronics should contribute to the solution because it by-passes the lithography process.

Tang doesn’t think the industry will abandon lithography altogether any time soon. But he expects self-assembling electronics will become part of the chip fabrication process as an additional technique in the near future.

Tang and his lab mates communicated their findings in a paper titled ‘Self-assembly of well-defined ferrocene triblock copolymers and their template synthesis of ordered iron oxide nanoparticles’ published in the journal Chemical Communications [paywalled].

Source: Sc.edu

Image: Math.nist.gov

 

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    avatar Tessel Renzenbrink is the editor of TechTheFuture. I'm a freelance writer with a focus on the disruptive force of technology, IT and the energy transition mainly.